Datasheet-a-Day W28 2020
My regular Sunday datasheets round-up...
The Good, the Bad, and the Ugly Aspects of ADC Input Noise—Is No Noise Good Noise? (Analog MT-003)
Some noise on the input of an ADC can improve resolution! Huh? All will be explained, apparently.
Input-referred noise “fuzzes out” ADC code transitions. This effect can be measured by looking at a histogram of ADC outputs for DC input. Averaging can give you improved resolution and reduce the impact of input noise in return for a reduction in sample rate.
Side note: There are so many terms used for characterising the performance of ADCs. It’s extremely confusing! Terminology fail example: ENOB (effective number of bits) and effective resolution are totally unrelated terms...
In some cases, noise dithering at the ADC input can improve SFDR (that’s one ADC performance measure I like and can remember: it’s pretty unambiguous) by breaking correlations between the input and quantisation noise (cf. MT-001 here). (Most of the time your system will have enough noise all on its own to make this unnecessary!)
There are some more exotic noise dithering approaches that I don’t yet understand. There’s some interesting material to revisit here once I know more about signal processing and ADCs. It might be good to come up with a project that relies on very linear ADC behaviour to drive learning this stuff.
Best Practices for Board Layout of Motor Drivers (TI SLVA959A)
34 pages, 53 pictures. I like that ratio!
“Star ground” vs. “single point ground”–didn’t know about that distinction. A single point ground takes all ground traces to a central point, which is then connected to the supply; a star ground takes all traces to a single point which may not be central. A single point ground is recommended for power traces, and a star ground for signal traces.
Ground plane partitioning isn’t about cutting the ground plane, but about making sure different kinds of circuit elements are partitioned into distinct areas of the board so that their ground planes are effectively distinct (cf. Maxim TUT5450 from last week).
“Gridding” of ground fills is something you do when your ground “plane” is broken up by other traces (and from the example shown here, doesn’t really deserve the designation “plane” at all!). The main idea seems to make minor modifications to the ground fills to ensure that any signal has a lower impedance return path to ground. In particular, the idea seems to be to try to build a “grid” of ground connections, so that there are no places where there are single-ended routes across the ground fill back to ground. The claim is that properly gridded ground fills are almost as effective as a solid ground plane.
If you can (4-layer board or bigger 2-layer board), use a ground plane. (You still need to think: avoid placing vias so that they break up the ground plane too much.) Layout on tighter 2-layer boards can be tricky: keep sensitive signals away from noisy stuff like power FETs, charge pumps, etc.
Lots of problems to worry about... Coupling between traces: keep the noisy stuff away from the sensitive stuff and use a ground plane if you can. Common and differential mode noise. EMC considerations: every return path makes a current loop; every current loop is an antenna! Keep the loops small. Power supply loops (need some care), signal loops (usually small). For high frequency signals, vias can perturb return paths increasing loop areas.
More things to worry about... Thermal design: thermal pads on ICs are there for a reason. Connect them to continuous top-side copper pours, connect those pours to a solid ground plane when you can, and provide lower thermal resistance paths for heat flow from under the driver device–avoid broken ground pours. Also, use thicker copper for thermal reasons: I’d not seen that before, but it makes sense. Thermal vias: a couple of interesting things here. First, don’t use thermal relief for thermal vias (duh). Second, don’t cover thermal vias with soldermask, because it causes voiding. (Not sure how that happens. But it seems like what I thought was a mistake in the layout of my Solder Snorter thing was actually the right thing to do...)
And more... Via current capacity: I’m always surprised at how much current small PCB features can carry. The table here says that a 16 mil via (that’s 0.4 mm) can carry 1.1 A with a temperature rise of 10°C. An amp sounds like a lot to me, so that’s quite impressive. Multi-vias for: low impedance grounding, thermal conduction, stitching for high current paths. Via placement: don’t split the ground plane too much! Don’t want to disrupt return paths.
General routing considerations: keep high current traces short and fat; keep high frequency loops small (switching signals, etc.); no right angle bends; smooth transitions from pads to thinner traces and from vias to traces (teardrops); keep electrically symmetrical things symmetrical in the routing (differential pairs, in-line components, etc.); keep analog and digital grounds separate.
Bulk capacitors: place near power supply; multi-via to power plain; low ESR. Charge pump capacitors: place as close to driver as possible. (This might be a bit TI-specific, but I’ve not looked at enough bigger motor drivers to know how common it is to have external charge pump capacitors.) Bypass capacitors: keep them close; keep the smallest closest; no vias between active device and bypass capacitors; multi-vias to ground; widest traces possible–basically do everything you can to reduce the impedance in the bypass loop.
Seems like everything is “critical”!
Layout: parasitics in H-bridges; high-current, high-frequency, needs special care for the “switch node”, i.e. the node connected to the load. As usual the answer is “lots of copper, not much distance”.
Current sensing... Mostly stuff I’d seen before, but one thing they say is that the sense signals should be routed as a differential pair. I think I’ll do that in my current project! Hmmm. They also talk about input filters for your sensing amplifier. Don’t really know anything about that. Investigation needed!
Noise Power Ratio (NPR)—A 65-Year Old Telephone System Specification Finds New Life in Modern Wireless Applications (Analog MT-005)
The NPR is a measure of the “quietness” of an unused channel in a multi-channel system when there is random activity on other channels. Totally failed to get the point of this one, which is about applying this noise measure to ADCs. One to revisit in the future maybe.
How to Apply DC-to-DC Step-Down (Buck) Regulators (Analog AN-1125)
This starts with some basic stuff about switching regulators. It talks about how most microcontroller/microprocessor applications use a combination of switching regulators and LDOs to get the range of supply voltages needed with a reasonable efficiency.
Some comments about how low power buck regulators usually use switching frequencies between 1 MHz and 6 MHz. Higher switching frequencies mean that you can use smaller inductors, but you do lose about 2% in efficiency for every doubling of switching frequency, so that’s something to remember.
The Analog Devices components described here have some additional operating modes for low power. They also mention the Analog ADISimPower design tool, which is probably worth a look.
LM339, LM239, LM139, LM2901 Quad Differential Comparators (TI)
These are jellybean comparators that come in lots of variants and packages. They can run off a supply voltage from 2 - 36V, so you can use them more or less anywhere. Also, they have open drain outputs, which means you can set the output high logic level with a pull-up resistor to whatever supply voltage you’re using. Simple idea, but combined with the wide input supply voltage range, it makes these things very adaptable.
There are a bunch of transistor circuit examples in the applications section of the datasheet. I need to revisit these after reading Chapter 2 of The Art of Electronics, which I’m working through now.
Update: I’ve since read a TI app note (SNOAA35A) that indicates that these are actually pretty outmoded parts, and there are better choices for comparators to use now!
Noise Figure—An Often Misunderstood and Misinterpreted Specification (Analog MT-006)
I’m reading through these Analog Devices “mini-tutorials” one-by-one, but some of them just pass me by because I don’t yet have the background needed to understand them. This was one of those!